Multi-step mask process flows may be used to manufacture thin-film transistor devices, including thin-film transistors that operate pixels in an electronic display. Pixel thin-film transistors may include a common voltage electrode. This common voltage electrode (VCOM electrode) may have a relatively high sheet resistance, which is undesirable.
Accordingly, some pixel thin-film transistors employ a third metal layer to reduce the sheet resistance of the VCOM electrode. (Generally, the first and second metal layers correspond to the gate and source/drain of the transistor.) The implementation of a third metal layer may add an additional mask to the process flow, thereby increasing the cost of manufacture and reducing the manufacturing yield. Generally, any increase in the number of masks required to create a transistor has an adverse effect on manufacturing.
The number of masks may be reduced by using a halftone process etch both the common electrode and third metal. However, such a halftone process may result in a loss of thickness in the planarization layer during an ashing process used to remove the photoresist that forms the halftone. This may result in, ultimately, a mis-formed via hole between a pixel conductive upper layer and the source/drain or gate metal. Thus, it may be desirable to protect the planarization layer during manufacturing.